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Keynote Speakers

 

IEEE Fellow, YEN-NUN HUANG
Professor, Academia Sinica, Taiwan

Dr. Huang received his PhD in Computer Science from University of Maryland.  He Joined AT&T Bell Labs in 1989. His work on Software Implemented Fault Tolerance (SwiFT) tools was applied to tens of telecommunication systems in AT&T and was named one of the ten major technology breakthroughs in Bell Laboratories in 1992.  Because of the SwiFT work, Dr. Huang was a recipient of Lucent Commemorating Stock Certificate and Computerworld Smithsonian Award in 1998 on the SwiFT technology.  He became a Distinguished Member of Technical Staff of Bell Labs in 1996.  He started the Dependable Computing Research Department in AT&T in 1999 and was the department head of the organization to ensure the high dependability of all AT&T services.  Dr. Huang became the VP of Engineering of PreCache Inc, a Sony subsidiary,  in 2001 to create a multi-media content delivery platform. In late 2004,  Dr. Huang returned to AT&T and became the Executive Director of Dependable Distributed Computing and Communication Research Department to lead AT&T Digital Content Management and IPTV research programs. In 2007, Dr. Huang became the Executive Vice President of Institute for Information Industry, a government funded R&D organization with more than 1800 employees.  From 2008 to 2011,  Dr. Huang was the President of VeeTIME Co. to build quadruple-play telecom services including cable TV, FTTx, NGN and 4G Wimax using an all-IP network in central and south Taiwan.  With his leadership in R&D and in management, VeeTIME service availability was improved from 95% to 99.96% in a year.  Dr. Huang has more than 20 US patents awarded and more than 100 papers published in well-known journals and conferences.    His 1995 Software rejuvenation paper created software fault avoidance and prevention research area and was awarded Jean-Claude Laprie Award in 2019. Dr. Huang was the Deputy Executive Secretary of Science and Technology Advisory Group of Executive Yuan,  helping Premier of Executive Yuan in Taiwan on the Information and Communication Technology (ICT) development policy and funding allocation between 2010 and 2015.  Dr. Huang is an IEEE Fellow. 

 

Habil. Sergei Gorlatch,
Professor, University of Muenster, Germany

Sergei Gorlatch has been Full Professor of Computer Science at the University of Muenster (Germany) since 2003. Earlier he was Associate Professor at the Technical University of Berlin, Assistant Professor at the University of Passau, and Humboldt Research Fellow at the Technical University of Munich, all in Germany. Prof. Gorlatch has about 200 peer-reviewed publications in renowned international books, journals and conferences. He was principal investigator in several international research and development projects in the field of parallel, distributed, Grid and Cloud algorithms, networking and computing, as well as e-Learning, funded by the European Commission and by German national bodies. Among his recent achievements in the area of communications and future Internet is the novel Real-Time Framework (www.real-time-framework.com ) developed in his group as a platform for high-level development of real-time, highly interactive applications. In the area of networking, his group has been recently working in the pan-European project OFERTIE on an application-oriented Quality of Service approach for emerging Software-Defined Networks (SDN).

 

Masahiro Fujita
Professor,
The University of Tokyo, Japan

Masahiro Fujita received his Ph.D. in Information Engineering from the University of Tokyo in 1985 on his work on model checking of hardware designs by using logic programming languages. In 1985, he joined Fujitsu as a researcher and started to work on hardware automatic synthesis as well as formal verification methods and tools, including enhancements of BDD/SATbased techniques. From 1993 to 2000, he was director at Fujitsu Laboratories of America and headed a hardware formal verification group developing a formal verifier for real-life designs having more than several million gates. The developed tool has been used in production internally at Fujitsu and externally as well. Since March 2000, he has been a professor at VLSI Design and Education Center of the University of Tokyo. He has done innovative work in the areas of hardware verification, synthesis, testing, and software verification-mostly targeting embedded software and web-based programs. He has been involved in a Japanese governmental research project for dependable system designs and has developed a formal verifier for C programs that could be used for both hardware and embedded software designs. The tool is now under evaluation jointly with industry under governmental support. He has authored and co-authored 10 books, and has more than 200 publications. He has been involved as program and steering committee member in many prestigious conferences on CAD, VLSI designs, software engineering, and more. His current research interests include synthesis and verification in SoC (System on Chip), hardware/software co-designs targeting embedded systems, digital/analog co-designs, and formal analysis, verification, and synthesis of web-based programs and embedded programs.